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飛思卡爾實(shí)習(xí)生招聘信息
發(fā)布于:2011-06-10 09:51:53   |   來源:研究生院   |   作者:admin   |   瀏覽次數(shù):5551
 

Position: 

Analog Layout Engineer (Part Time Intern)

 

Job Description:

Perform full-custom layout, physical verification and parasitic extraction for Freescale analog blocks and IO libraries. Generate all the physical views for chip level integration.

 

Job Requirements:

  Graduate students in Electrical Engineering Department

  Be familiar with layout-related EDA tools, such as Virtuoso/Virtuoso   XL, Assura from Cadence and Calibre DRC/LVS from Mentor Graphic

  Knowledge on CMOS fabrication process and device structure is a plus

  Knowledge on analog circuit design is a plus

  Good communication skills in English

  Be interested in custom layout work and self-motivated


Contact Information:

Please submit your resume to Robert and Sunny by 10-July-2009. Please understand that because there are so many resumes to be reviewed, we will not reply your mail unless you are selected to enter the interview section.

 

Please send your resume to mailbox:

Robert Guo ([email protected])

Sunny Zhang ([email protected])

 

 

 

 

 

 

Position: 

EMC R&D Engineering Intern

 

Job Description:

-- Perform EMC related tests, including IC level EFT, CE/RE and CI/RI tests; as well as board level EMC test. Be responsible for edit EMC report.

 

-- Design EMC test board, validation board, and necessary daughter cards. Responsibilities will include the PCB schematic design, creation of component symbols and footprints, mechanical evaluation, component placement, signal routing, library maintenance and documentation.

 

-- R&D on EMC/ESD modeling and on how to improve EMC/ESD performance on IC and PCB level to meet IEC EMC performance and to meet specify request from customer. To work with IC design engineers to create high EMC performance chips.

 

Job Requirements:

Achieving EE master degree or above.

Strong background knowledge on EMC and microwave.  Understand EMC improvement techniques on both IC level and board level.

Familiar with IEC EMC Standards.

Experienced on lab job, including the operation of normal lab equipments.

Experience on PCB design is a big plus.

Knowledge on IC modeling is a big plus.

Knowledge on IC design is a big plus.

Knowledge on software coding is a plus.

Good at English, especially listening and writing.

Good communication skills

Team player

 

Please send your resume to mailbox:

[email protected]